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A.l Test FTVd reconstruction results of the Chinese character “light” for
the single-pixel CS imaging system for various μ and a maximum β of
1024. A smaller μ yields a smoother image while a larger μ gives a
sharper but noisier image......................... 64
B.l Terahertz SLM control system diagram. The control system consists
of three circuit boards: the FPGA platform which controls the
switching of each SLM pixels and the synchronization between the
SLM and the Т-ray system, two line driver boards which increase the
voltage amplitude of each switching signal from 3V to 16V, and the
SLM board which holds the SLM chip.................. 67
B.2 Xilinx AFX-FF1760 FPGA prototyping platform (before the Virtex-5
LX330 FPGA is mounted). The ZIF socket is convenient for the
mounting and dismounting of the FPGA................. 68
B.3 (a) The LX330 FPGA is one of the largest FPGA in the Virtex-5
family. It contains 1200 user-configurable I∕O,s, thus sufficient to
control 1024 SLM pixels simultaneously, (b) The USB-JTAG
programming cable connects the USB port of a computer to the
JTAG port on the FPGA prototyping platform. The Xilinx ISE
software programs the FPGA through this cable............ 69
B.4 Line driver circuit board, which amplifies the voltage amplitudes of
512 FPGA control signals from 3V to 16V. The circuit board
contains two banana cable jacks, a Zener diode and a fuse for circuit
protection, a bypass capacitor, connectors to connect from the FPGA
circuit and to the SLM board, and 512 voltage-amplifying circuit
made of bipolar transistors and resistors................. 72