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В.5 Bipolar-junction-transistor (BJT) set up as a common-emitter
amplifier for voltage amplification. Each 3V control signal from the
FPGA circuit acts as the input to one common-emitter amplifier, and
the output passes onto each SLM pixel after being amplified to 16V. . 73
B.6 Screen capture of the 4-layer line driver circuit board in the Allegro
Cadence PCB design software, showing only the components and
their padstacks, and board dimensions.................. 74
B.7 (a) The SLM circuit board has a 34 mm × 34 mm square hole
surrounded by 1040 gold bond fingers, designed to mount and to
wire-bond the SLM chip, (b) Besides the SLM chip, the SLM circuit
board also has 24 cable connectors which receives voltage-amplified
control signals from the line driver circuit................ 75
B.8 Screen capture of the top layer of the 4-layer SLM circuit board in
the Cadence PCB design software, showing partially the wire
connections among the various components. The middle upper layer
is the ground plane, while the middle lower layer is the power plane. . 76
B.9 Diagrams of SLM board showing how the SLM chip is mounted and
wire-bonded onto the PCB (side-view (a) and top-view (b))...... 77
B. 10 Detailed diagram near the square hole on the SLM board, with
dimensions of the PCB bond fingers, and of the bond pads (schottky
and ohmic contacts) of the SLM chip. Careful choices of the
dimensions of bond pads and bond fingers, and the distances among
them ensure successful wire-bonding................... 78
B. 11 Microscope images of the wire-bonded SLM chip from VLSIP
Technologies, Inc., showing the 1-mil gold wires between the die pads
and the gold bond fingers on the SLM board before and after
encapsulating the wires with Hysol® FP4450.............. 79