The name is absent

65

Appendix В

Second-generation terahertz SLM control system

When designing the second-generation 32 × 32 terahertz SLM, not only the chip
design itself, but also the wiring, packaging and control of the chip become challenging.
The chip design needs to compact all the pixels, on-chip wires and bond pads to a
chip of a reasonable size, while keeping metal parts at a safe distance from each other
to avoid air breakdown at a voltage difference of 16V. Chip packaging should be able
to accomodate over a thousand wire connections from the control circuit to a small
chip, but, at the same time, allow movement on an optical table for making terahertz
measurements. Automatic and synchronous switching of over a thousand SLM pixels
at high speed and at the specified voltages require advanced digital circuit systems,
and careful design of cable connections among the circuit boards. This appendix
describes the details concerning this control circuit.

The second-generation SLM has 1,024 pixels. Individually switching on and off
each pixel require a programmable control circuit. The current design of the control
system consists of three circuit boards: a FPGA circuit which controls the switching
of each SLM pixels and the synchronization between the SLM and the Т-ray system,
two line driver circuits which increase the voltage amplitude of each switching signal
from 3V to 16V, and the SLM board which holds the SLM chip (see Figure B.l). The
following sections describe each part of the control system in detail.

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