The name is absent

Test chip KOmm x 20mm I

Test module ( 1200urn x 6θθι>m)

Figure 2.1: Design structure used by Doh et al. to characterize spatial correlation in
process variations [23]. The left part is the 4 × 5 module array that they
used in the experiment. Each module includes 16 patterns of nMOS, 16
patterns of pMOS, and an oscillator.

voltage of nMOS transistors. Saturation voltage of transistors in close modules,
like Ml and М2, are strongly correlated. The right side of Figure 2.2 shows that
the correlation decreases linearly with distance.

To characterize accurately variations, Friedberg et al. [30] used Electrical
Linewidth Metrology (ELM) to measure transistors feature sizes in a 200mm
wafer. They used the Kelvin test to find linewidth by ELM measurements. Fig-
ure 2.3 shows variations distribution of 130nm technology for a complete wafer.
Patterns of inter-die and intra-die variations can be clearly observed in the pic-
ture. They measured dimension variations of all transistors in a number of wafers
and introduced a variation model for the transistor dimensions. They proposed a
piecewise linear fit to the measurement data. Their experimental results showed

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